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XC2S300E-7FG456C

XC2S300E-7FG456C资料
XC2S300E-7FG456C
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File Size : 116 KB
Manufacturer:XILINX
Description:• ARCHITECTURE FEATURES   Enhanced Pin-Locking Architecture, Symmetrical   Generic Logic Blocks Connected by Hierarchical   Big Fast Megablock and Global Routing Planes   Product Term Sharing Array Supports up to 28   Product Terms per Macrocell Output   Macrocells Support Concurrent Combinatorial and   Registered Functions   Embedded Tristate Bus Can Be Used as an Internal   Tristate Bus or as an Extension of an External   Tristate Bus   Macrocell and I/O Registers Feature Multiple Control   Options, Including Set, Reset and Clock Enable   I/O Pins Support Programmable Bus Hold, Pull-Up,   Open-Drain and Slew Rate Options   Separate VCCIO Power Supply to Support 3.3V or   2.5V Input/Output Logic Levels   I/O Cell Register Programmable as Input Register for   Fast Setup Time or Output Register for Fast Clock to   Output Time
 
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型 号:XC2S300E-7FG456C
厂 家:XILINX
封 装:FPGA
批 号:02+
数 量:10
说 明:绝对原装深圳现货/底价
 
 
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联系人:龙先生,胡小姐
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公司地址: 深圳市福田区中航路新亚洲电子商城国利大厦710室.
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