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| IPB05N03LA资料 | |
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IPB05N03LA PDF Download |
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File Size : 116 KB
Manufacturer:infineon Description:Synchronous Output Enable. When HIGH, it stops clock outputs (except 2Q0 and 2Q1) in a LOW state (for PE = H or M) C 2Q0 and 2Q1 may be used as the feedback signal to maintain phase lock. When TEST is held at MID level and sOE# is high, the nF[1:0] pins act as output disable controls for individual banks when nF[1:0] = LL. Set sOE# LOW for normal operation. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：IPB05N03LA 厂 家：infineon 封 装：D2PAK 批 号：04+ 数 量：6000 说 明：绝对原装深圳现货/底价 |
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