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EP20K300EQC240-2X

EP20K300EQC240-2X资料
EP20K300EQC240-2X
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File Size : 116 KB
Manufacturer:XILINX
Description:Regardless of the condition of E, the outputs will go to the OFF or high-impedance state upon the next positive clock edge after the synchronous enable (ES) input is switched to a HIGH level. If the synchronous enable pin is switched to a logic LOW, the subsequent positive clock edge will return the output to the active state if E is LOW. Following a positive clock edge, the address and synchronous enable inputs are free to change since no change in the output will occur until the next LOW-to-HIGH transition of the clock. This unique feature allows the CY7C235A decoders and sense amplifiers to access the next location while previously addressed data remains stable on the outputs.
 
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型 号:EP20K300EQC240-2X
厂 家:XILINX
封 装:QFP240
批 号:04+
数 量:17
说 明:绝对原装正品底价
 
 
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