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| 74AHCT541PW资料 | |
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74AHCT541PW PDF Download |
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File Size : 116 KB
Manufacturer:PHILIPS Description:The MSB of the previous conversion appears on DATA OUT on the falling edge of CS in mode 1, mode 3, and mode 5, on the rising edge of EOC in mode 2 and mode 4, and following the 16th clock falling edge in mode 6. The remaining nine bits are shifted out on the next nine falling edges of I/O CLOCK. Ten bits of data are transmitted to the host through DATA OUT. The number of serial clock pulses used also depends on the mode of operation, but a minimum of ten clock pulses is required for conversion to begin. On the 10th clock falling edge, the EOC output goes low and returns to the high logic level when conversion is complete and the result can be read by the host. On the 10th clock falling edge, the internal logic takes DATA OUT low to ensure that the remaining bit values are zero if the I/O CLOCK transfer is more than ten clocks long. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：74AHCT541PW 厂 家：PHILIPS 封 装：TSOP 批 号：0530+ 数 量：1800 说 明：绝对原装正品底价 |
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运 费： 所在地： 新旧程度： |
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| 联系人：龙先生,胡小姐 |
| 电 话：0755-83226907,83229025,83226903 |
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| 公司地址： 深圳市福田区中航路新亚洲电子商城国利大厦710室. |
